Sigma-Delta analog-to-digital converters are used for situations requiring high resolution and/or high bandwidth. The prior art is extensively described in U.S. Pat. No. 5,392,042, issued Feb. 21, 1995 in the name of Pellon.
Certain prior-art sigma-delta analog-to-digital converters, in implementations using continuous-time (not sampled in time)loop filters together with a sampling analog-to-digital converter and a corresponding sampling digital-to-analog converter, it is not possible to select the center frequency to the frequency at which the analog signal is centered, and at which noise is to be attenuated, independently of the sampling rate. In order for the prior-art converters to achieve a particular amount of noise reduction over a particular bandwidth, high-order filters were required, which in turn resulted in out-of-band "noise growth," in which the quantizing noise outside the band of interest is amplified. This noise causes a quantizer with limited range (number of bits) to truncate or clip noise peaks, resulting in instability of the sigma-delta loop. Also, in any continuous-time implementation, the tolerances of component values used in the loop filters, and the changes in value as a function of frequency, tends to reduce performance, or even to cause instability.
An improved sigma-delta analog-to-digital converter is desired.